SEE (Single Event Effect)
SEE (Single Event Effect) occurs when radiation (protons, neutrons, heavy ions, gamma rays, etc.) passes through a semiconductor and ionizes the medium, causing operational errors in the circuit. The electron-hole pairs generated through the ionization process can reach the sensitive region of the semiconductor, and if the quantity is sufficient to change the operational state, errors occur. SEE is generally a non-destructive and transient error, which can be resolved by resetting the value or power.
Effects and Types of SEE
SEE manifests in various phenomena within semiconductor devices. One such manifestation is the Single Event Upset (SEU), often referred to as a “soft error.” SEU is a temporary logical error that changes the stable logic state of circuits with bi-stable functions such as latches, flip-flops, or memory cells due to a single particle-induced upset. For instance, an SEU in a memory cell may change a stored logic value from ‘0’ to ‘1’ or vice versa. However, rewriting the value as ‘0’ or ‘1’ returns the system to normal operation, thus classifying it as a soft error.
Similarities and Differences of Single Event Effects
Source: Ray Ladbury. “Radiation hardening at the system level.”
In 2007 Nuclear and Space Radiation Effects Conference Short Course Notebook, 2007.
Soft Error
SEU (Single Event Upset)
This occurs when a single logic or information bit is upset. If the affected bits are physically adjacent or multiplexed into different words, it may manifest as a multi-bit upset. SEU refers to changes in logic values of storage circuits such as memory devices, latches, and registers.
SCU (Single Cell Upset)
This is an SEU that affects only a single cell or logic bit (latch, flip-flop, etc.), as opposed to an MCU.
SCU
MBU (Multi-Bit Upset)
A single event that causes multiple upsets within the same logic word (e.g., frame/column/sector in FPGAs). It can also lead to multiple single-bit upsets across adjacent words.
MCU (Multi-Cell Upset)
An event that simultaneously flips multiple cells (e.g., memory cells or flip-flops) in an integrated circuit. These cells are often physically adjacent but may not be logically adjacent depending on layout and routing.
MCU
SED (Single Event Disturb)
A temporary instability in SRAM cells that may eventually return to a stable state. This condition is associated with SEU characteristics but may also result in soft errors if the unstable state lasts long enough to be read. SED appears as a voltage spike due to ion-induced charge separation at junctions. It is similar to SET but distinct in affecting stored states in logic elements.
SEFI (Single Event Functional Interrupt)
A SEE that causes a component to malfunction (reset, lock-up) in a detectable way without permanent damage. SEFIs are often related to SBU/MBU in control bits or registers and are recoverable through reset or power cycling. Unlike SELs, SEFIs do not typically cause high current. They may result in error bursts or long functional outages.
SET (Single Event Transient)
A short-lived impulse generated by a SEE in a combinational logic output gate. If latched during an active clock edge, it can propagate as an error. SET propagation can be suppressed by logical, temporal, or electrical masking. In ASICs, more than 90% of SETs are masked, with only 10% potentially resulting in upsets. Larger ASICs increase SET occurrence exponentially. Analog SETs (ASETs) may generate spurious signals, affecting digital logic.
Hard Error
SEL (Single Event Latch-up)
A high-current abnormal state triggered by parasitic thyristor activation, persisting until power is reset. SEL can result in overheating or localized metal fusing. Micro-SELs are usually non-destructive and harder to detect due to small current increases.
SEHE (Single Event Hard Error)
A hard error caused by a single radiation strike, highlighting irreversible damage such as substrate destruction beyond the scope of SEU.
SEGR (Single Event Gate Rupture)
A failure event in MOSFETs caused by particle impact, damaging the gate oxide and increasing leakage currents, leading to device failure.
SEDR (Single Event Dielectric Rupture)
A breakdown of dielectric material induced by radiation. Though observed in tests, SEDR has not been reported in space missions and is largely of academic interest.
SEB (Single Event Burn-out)
A destructive high-current state in power transistors caused by a single particle impact. It may lead to permanent failure and tends to occur less frequently at higher temperatures.
SESB (Single Event Snap-Back)
Similar to SEL, this occurs when avalanche multiplication triggers a parasitic path in the affected transistor, which remains conducting until reset.
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